View IRS21571D_1580761.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

april 21st, 2008 IRS21571D fully integrated ballast control ic ic features ? programmable preheat time and frequency ? programmable ignition ramp ? protection from failure-to-strike ? lamp filament sensing and protection ? protection from operation below resonance - ? 0.2v cs threshold sync?d to falling edge on lo ? protection from low-line condition ? automatic restart for lamp exchange ? thermal overload protection ? programmable deadtime ? integrated 600v level-shifting gate driver ? integrated bootstrap mosfet ? integrated 15.6v zener clamp diode on vcc ? low micro-power start-up ? latch immunity and esd on all pins typical application ? fluorescent lamp ballast typical connection diagram product summary topology half-bridge v offset 600 v i o+ & i o- (typical) 180 ma & 260 ma oscillator frequency +/- 5% start-up current (typical) 150 a package options 16-lead soic (narrow body) + v bus + rectified ac line v bus return r ph r run r t c t c ramp c ph r dt c bs r supply c vcc r cs l res c res r ghs r gls c block c snubber r1 r2 c1 r oc r4 r3 r5 c2 d1 d2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 IRS21571D vdc cph rph rt run ct dt oc lo com vcc vb vs ho sd cs www.irf.com ? 2008 international rectifier
IRS21571D www.irf.com ? 2008 international rectifier 2 table of contents page typical connection diagram 1 qualification information 4 absolute maximum ratings 5 recommended operating conditions 6 electrical characteristics 7 functional block diagram 9 input/output pin equivalent circuit diagrams 10 lead definitions 11 lead assignments 12 state diagram 13 application information and additional details 14 package details 25 part marking information 26 ordering information 27 change history 28
IRS21571D www.irf.com ? 2008 international rectifier description the IRS21571D is a fully integrated, fully protected 600v ballast control ic des igned to drive virtually all types of rapid start fluorescent lamp ballasts. externally pr ogrammable features such as preheat time and frequency, ignition ramp characteristics, and running mode operati ng frequency provide a high degree of flexibility for the ballast design engineer. comprehensive thermal overload, or lamp failure during normal operation, as well as an automatic restart function, have been incl uded in the design. the heart of this control ic is a variable frequency, 50% duty cycle oscillator with externally programmabl e deadtime. an integrated bootstrap mosfet is also included to supply the high-side gate drive circuitry. the IRS21571D is available in 16 pin narrow body soic package.
IRS21571D www.irf.com ? 2008 international rectifier 4 qualification information ? industrial ?? qualification level comments: this family of ics has passed jedec?s industrial qualification. ir?s consumer qualification level is granted by extension of t he higher industrial level. moisture sensitivity level soic16n msl2 ??? (per ipc/jedec j-std-020) machine model class c (per jedec standard eia/jesd22-a115) esd human body model class 3a (per eia/jedec standard jesd22-a114) ic latch-up test class , level a (per jesd78) rohs compliant yes ? qualification standards can be found at international rectifier?s web site http://www.irf.com/ ?? higher qualification ratings may be available should the user have such requirements. please contact your international rectifier sales repr esentative for further information. ??? higher msl ratings may be available for the specific package types listed her e. please contact your international rectifier sales repres entative for further information.
IRS21571D www.irf.com ? 2008 international rectifier absolute maximum ratings absolute maximum ratings indicate sustained limit s beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to co m, all currents are defined positive into any lead. the thermal resistance and power dissipation ra tings are measured under board mounted and still air conditions. symbol definition min. max. units v b high side floating supply voltage -0.3 625 v v s high side floating supply offset voltage v b - 25 v b + 0.3 v v ho high-side floating output voltage v s - 0.3 v b + 0.3 v v lo low-side output voltage -0.3 v cc + 0.3 v i omax maximum allowable output current (either output) due to external power transistor miller effect -500 500 ma i rt rt pin current -5 5 ma v ct ct pin voltage -0.3 5.5 v v dc vdc pin voltage -0.3 v cc + 0.3 v i cph cph pin current -5 5 ma i rph rph pin current -5 5 ma i run run pin current -5 5 ma i dt deadtime pin current -5 5 ma v cs current sense pin voltage -0.3 5.5 v i cs current sense pin current -5 5 ma i oc over-current threshold pin current -5 5 ma i sd shutdown pin current -5 5 ma i cc supply current ? -20 20 ma dv/dt allowable offset voltage slew rate -50 50 v/ns p d package power dissipation @ t a +25oc (16-pin dip) --- 1.60 w p d package power dissipation @ t a +25oc (16-pin soic) --- 1.25 w r ja thermal resistance, junction to am bient (16-pin dip) --- 75 oc/w r ja thermal resistance, junction to ambient (16-pin soic) --- 100 oc/w t j junction temperature -55 150 t s storage temperature -55 150 oc t l lead temperature (soldering, 10 seconds) --- 300 ? this ic contains a zener clamp structure between the chip v cc and com which has a nominal breakdown voltage of 15.6v. please note that this supply pin should not be driven by a dc, low impedance power source greater than the v clamp specified in the electrical characteristics section.
IRS21571D www.irf.com ? 2008 international rectifier 6 recommended operating conditions for proper operation the device should be used within the recommended conditions. symbol definition min. max. units v bs high side floating supply voltage v bsuv+ v clamp v v s steady state high side floating supply offset voltage -3.0 600 v v cc supply voltage v ccuv+ v clamp v i cc supply current ? 10 ma v dc vdc pin voltage 0 v cc v c t ct pin capacitance 220 --- pf r dt deadtime resistance 1.0 --- k r oc over-current (cs+) threshold programming resistance --- 50 k i rt r t pin current ?? -500 -50 a i rph r ph pin current ?? 0 450 a i run run pin current ?? 0 450 a i sd shutdown pin current -1 1 ma i cs current sense pin current -1 1 ma t j junction temperature -40 125 oc ? enough current should be supplied into the vcc pin to keep the internal 15.6v zener clamp diode on this pin regulating its voltage. ?? due to the fact that the rt input is a voltage-contro lled current source, the total rt pin current is sum of all of the parallel current sources connected to that pin. for optimum oscillator current mirror performance, this total current should be kept between 50 a and 500 a. during the preheat mode, the total current flowing out of the rt pin consists of the rph pin current pl us the current due to the rt resistor. during the run mode, the total rt pin current consists of the run pin current plus the the current due to the rt resistor.
IRS21571D www.irf.com ? 2008 international rectifier 7 electrical characteristics v cc = v bs = v bias = 14v +/- 0.25v, r t = 16.9k , c t = 470 pf, r ph and run pins no connection, v cph = 0v, r dt = 6.1 k , r oc = 20.0 k , v cs = 0.5 v, v sd = 0 v, c l = 1000pf and t a = 25 c unless otherwise specified. symbol definition min typ max units test conditions supply characteristics v ccuv + v cc supply undervoltage positive going threshold 11.5 12.5 13.5 v cc rising from 0v v uvhys v cc supply undervoltage lockout hysteresis --- 2.0 --- v i qccuv uvlo mode quiescent current --- 150 300 v cc = v ccuv + - 100mv i qccflt fault-mode quiescent current --- 400 600 a sd = 5v, cs = 2v, or tj > t sd i qcc quiescent vcc supply current 2 4.3 ct connected to com i qcc40k vcc supply current, f = 40khz 4.0 5.5 7.0 ma v clamp v cc zener clamp voltage --- 15.6 --- v i cc = 5ma floating supply characteristics i qbs0 quiescent v bs supply current --- 50 100 v ho = v s i qbs1 quiescent v bs supply current --- 72 140 ua v ho = v b v bsuv+ v bs supply undervoltage positive going threshold --- 9.0 --- v bs rising from 0v v bsuv- v bs supply undervoltage negative going threshold --- 8.0 --- v v bs falling from 14v i lk offset supply leakage current --- --- 50 a v b = v s = 600v oscillator i/o characteristics f osc oscillator frequency 43.7 46 48.3 khz d oscillator duty cycle 50 % v ct+ upper c t ramp voltage threshold --- 4.0 --- v ct- lower c t ramp voltage threshold --- 2.0 --- v v ctflt fault-mode c t pin voltage --- 0 --- mv sd = 5v, cs = 2v, or tj > t sd v rt rt pin voltage --- 2.0 --- v v rtflt fault-mode r t pin voltage --- 0 --- mv sd = 5v, cs = 2v, or tj > t sd tdlo lo output deadtime --- 2.3 --- sec tdho ho output deadtime --- 2.3 --- sec preheat characteristics i cph cph pin charging current 0.98 a v cph = 0v v cphign cph pin ignition mode threshold voltage 3.7 4.0 4.3 v cphrun cph pin run mode threshold voltage 4.6 5.0 5.4 v v cphflt fault-mode cph pin voltage --- 0 --- mv sd = 5v, cs = 2v, or tj > t sd
IRS21571D www.irf.com ? 2008 international rectifier 8 electrical characteristics v cc = v bs = v bias = 14v +/- 0.25v, r t = 16.9k , c t = 470 pf, r ph and run pins no connection, v cph = 0v, r dt = 6.1 k , r oc = 20.0 k , v cs = 0.5 v, v sd = 0 v, c l = 1000pf and t a = 25 c unless otherwise specified. symbol definition min typ max units test conditions rph characteristics i rphlk open circuit rph pin leakage current --- --- 0.1 a v rph = 5v, v ph = 6v v rphflt fault-mode rph pin voltage --- --- 50 mv sd = 5v, cs = 2v, or tj > t sd run characteristics i runlk open circuit run pin leakage current --- --- 0.1 a v run = 5v v runflt fault-mode run pin voltage --- 0 --- mv sd = 5v, cs = 2v, or tj > t sd protection circuitry characteristics v sd+ rising shutdown pin threshold voltage 2.0 2.2 2.4 v v sdhys shutdown pin threshold hysteresis 270 395 520 mv v cs+ over-current sense thre shold voltage 0.99 1.1 1.21 v v cs- under-current sense threshold voltage 0.15 0.2 0.26 v t cs over-current sense propagation delay 250 400 nsec delay from cs to lo v dc+ low v bus /rectified line input upper threshold 5.0 5.2 5.6 v v dc- low v bus /rectified line input lower threshold 2.8 3.1 3.4 v t sd thermal shutdown junction temperature --- 160 --- oc ? gate driver output characteristics v ol low-level output voltage 0 100 i o = 0 v oh high-level output voltage 0 100 mv v bias - v o , i o = 0 t r turn-on rise time 120 220 t f turn-off fall time 50 220 nsec i o+ output source current --- 180 --- i o- output sink current --- 260 --- ma ? when the ic senses an overtemperature condition (t j > 175oc), the ic is latched off. in order to reset this fault latch, the sd pin must be cycled high and then low, or the v cc supply to the ic must be cycled below the falling undervoltage lockout threshold (v ccuv- ).
IRS21571D www.irf.com ? 2008 international rectifier 9 functional block diagram over- temp detect level shift pulse filter & latch 2 4.0v 5.1v 3 5 3.0v 5.1v 1 1.0ua 4 2.0v i rt 6 i ct = i rt 7 4.0v 2.0v cph rph rt run ct dt vdc qs r2 q r1 q t rq 16 14 15 vs ho vb 13 11 12 com lo vcc 15.6v 9 sd 10 0.2v cs q s rq qd rq clk q s rq under- voltage detect 2.0v 8 oc 50ua bootstrap mosfet control vcc 10.4v 10.4v 10.4v 10.4v
IRS21571D www.irf.com ? 2008 international rectifier 10 input/output pin equivalent circuit diagrams
IRS21571D www.irf.com ? 2008 international rectifier 11 lead definitions symbol description vdc dc bus sensing input cph preheat timing capacitor rph preheat frequency resistor & ignition capacitor rt oscillator timing resistor run run frequency resistor ct oscillator timing capacitor dt deadtime programming oc over-current (cs+) threshold programming sd shutdown input cs current sensing input lo low-side gate driver output com ic power & signal ground vcc logic & low-side gate driver floating supply vb high-side gate driver floating supply vs high voltage floating return ho high-side gate driver outpur
IRS21571D www.irf.com ? 2008 international rectifier 12 lead assignments 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
IRS21571D www.irf.com ? 2008 international rectifier 13 state diagram uvlo mode 1 / 2 -bridge off i qcc ? 150 a cph = 0v oscillator off preheat mode 1 / 2 -bridge @ f ph cph charging @ i ph = 1 a rph = 0v run = open circuit cs disabled ignition ramp mode f ph ramps to f min cph charging @ i ph = 1 a rph = open circuit run = open circuit cs+ threshold enabled run mode f min ramps to f run cph charges to 10v clamp rph = open circuit run = 0v cs- threshold enabled vcc > 12.5v (uv+) and vdc > 5.2v (bus ok) and sd < 1.7v (lamp ok) and t j < 140c (t jmax ) cph > 4.0v (end of preheat mode) cph > 5v (end of ignition ramp) vcc < 10.5v (vcc fault or power down) or vdc < 3.0v (dc bus/ac line fault or power down) or sd > 2.2v (lamp fault or lamp removal) power turned on fault mode fault latch set 1 / 2 -bridge off i qcc ? 150 a cph = 0v vcc = 15.6v oscillator off t j > 140c (over-temperature) cs > cs+ threshold (failure to strike lamp or hard switching) or t j > 140c (over-temperature) cs > cs+ threshold (over-current or hard switching) or cs < 0.2v (no-load or below resonance) or t j > 140c (over-temperature) sd > 2.2v (lamp removal) or vcc < 10.5v (power turned off)
IRS21571D www.irf.com ? 2008 international rectifier 14 application information and additional details supply bypassing and pcb layout rules component selection and placement on the pc board is ex tremely important when using power control ics. v cc should be bypassed to com as close to the ic terminals as possible with a low esr/esl capacitor, as shown in figure 1 below. c vcc (surface mount) c boot (surface mount) c vcc (through hole) pin 1 ir21571 figure 1: supply bypassing pcb layout example a rule of thumb for the value of this bypass capacitor is to keep its minimum value at least 2500 times the value of the total input capacitance (ciss) of the power transistors being driven. this decoupling capacitor can be split between a higher valued electrolytic type and a lower va lued ceramic type connected in parallel, although a good quality electrolytic (e.g., 10 f) placed immediately adjacent to the vcc and com terminals will work well. in a typical application circuit, the supply voltage to the ic is normally derived by means of a high value startup resistor (1/4w) from the rectified line voltage, in comb ination with a charge pump from the output of the half- bridge. with this type of supply arrangement, the in ternal 15.6v zener clamp diode from vcc to com will determine the steady state ic supply voltage. connecting the ic ground (com) to the power ground both the low power control circuitry and low side gate driver output stage grounds return to this pin within the ic. the com pin should be connected to the bottom terminal of the current sense resistor in the source of the low side power mosfet using an individual pc board trace, as shown in figure 2. in addition, the ground return path of the timing components and v cc decoupling capacitor should be connected di rectly to the ic com pin, and not via separate traces or jumpers to other ground traces on the board. c vcc (surface mount) c vcc (through hole) ir21571 pin 1 timing components v bus return r cs (through hole) figure 2: com pin connection pcb layout example
IRS21571D www.irf.com ? 2008 international rectifier 15 these connection techniques prevent high current ground loops from interfering with sensitive timing component operation, and allows the entire control circuit to reject common-mode noise due to output switching. the control sequence and timing component selection the IRS21571D uses the following control sequence (figur e 3) to drive rapid start fluorescent lamps. f ph f run f min frequency t f start v cph 5v v rph 2v v run 2v preheat mode ignition ramp mode run mode figure 3: IRS21571D control sequence the control sequence used in the IRS21571D allows the run mode operating frequency of the ballast to be higher than the ignition frequency (i.e., f start > f ph > f run > f ign ). this control sequence is recommended for lamp types where the ignition frequency is too close to t he run frequency to ensure proper lamp striking for all production resonant lc component tolerances (please note t hat it is possible to us e the IRS21571D in systems where f start > f ph > f ign > f run , simply by leaving the run pin open). six pins in the ic are used to control the startup, preheat, ignition ramp, and run modes of operation, and to allow ballast and lamp engineers the flexibility to optimiz e their designs for virtually any lamp type. the heart of this controller is an oscillator which rese mbles those found in many popular pwm voltage regulator ics. in its simplest form, this oscillator consists of a timing resistor and capacitor connected to ground. the voltage across the timing capacitor c t is a sawtooth, where the rising porti on of the ramp is determined by the current in the r t pin, and the falling portion of the ramp is determined by an external deadtime resistor r dt . the oscillograph in figure 4 illustrates the relationship between the oscillator capacitor waveform and the gate driver outputs.
IRS21571D www.irf.com ? 2008 international rectifier 16 ct lo ho-vs figure 4 the deadtime can be programmed by means of the external r dt resistor, given a certain range of c t capacitor values, using the graph shown in figure 5. 0.1 1 10 1 10 100 rdt tdead ( usec ) ct = 220 p f ( kohms ) ct = 470 p f ct = 1 nf figure 5: deadtime versus r dt the r t input is a voltage-controlled current source, where the voltage is regulated to be approximately 2.0v. in order to maintain proper linearity between the r t pin current and the c t capacitor charging current, the value of the r t pin current should be kept between 50a and 500a. the r t pin can also be used as a feedback point for closed loop control.
IRS21571D www.irf.com ? 2008 international rectifier 17 during the startup mode , the operating frequency is determined by the parallel combination of r ph and r t , combined with the values of c t and r dt , and the voltage at the r t pin, as shown in figure 6. the voltage at the r t pin starts at an initial value above 2v, causing the initial start frequency to be higher than the preheat frequency. this frequency is high enough to ensure that the instantaneous vo ltage across the lamp during the first few cycles of operation does not exceed the strike potential of t he lamp. as the voltage at the r t pin decreases to the final value of 2v, the out put frequency ramps down to the preheat frequency. 2 4.0v 5.1v 3 5 7.6v 1.0ua 4 2.0v i rt 6 i ct = i rt 4.0v 2.0v cph rph rt 7 run ct dt qs r2 q r1 under- voltage detect c ph c ign r t c t r dt r run r ph figure 6: oscillator section block diagram with external component connection during the preheat mode , the operating frequency is determined by the parallel combination of r ph and r t , combined with the value of c t and r dt . this frequency, along with the preheat time , is normally chosen to ensure that adequate heating of the lamp filaments occurs. typically, a 4.5:1 ratio of the hot filament-to-cold filament resistance is desired for maximu m lamp life, as shown in figure 7 below
IRS21571D www.irf.com ? 2008 international rectifier 18 preheat run ignition ramp figure 7: lamp filament voltage during the preheat, ignition ramp and run modes the preheat time is programmed by means of the preheat capacitor, c ph , an internal 1 a current source, and an internal threshold on the cph pin of 4. 0v, according to the following formula: t 4e6 c , or c = 250e - 9 t ph ph ph ph = ? ? at the end of the preheat time, the internal, open-drain transistor holding the rph pin to ground turns off, and the voltage on this pin charges exponentially up to the r t pin potential. during this ignition ramp mode, the output frequency exponentially decays to a minimum value. t he rate of decay of this frequency is a function of the r ph ? c ramp time constant. because the ignition ramp mode ends when the voltage on the cph pin reaches 5.15v, the ignition ramp mode is always 1/4th as long as the preheat time. when the cph pin reaches 5.15v, an open-drain transis tor on the run pin turns on, and the external r run resistor is then in parallel with the r t resistor. the run mode operating frequency is therefore a function of the parallel combination of r run and r t , and this means that the operating power of the lamp can be programmed by means of r run . the following graphs, figures 8 and 9, illustrate the relationship between the effective r t resistance (i.e., the parallel combination of resistors which programs the c t capacitor charging current) and the operating frequency.
IRS21571D www.irf.com ? 2008 international rectifier 19 0 50 100 150 200 250 0 5 10 15 20 25 30 35 40 rt 0 50 100 150 0 5 10 15 20 25 30 35 40 rt freq ct=220 p f , rdt=5.6k ( khz ) ct=220 p f , rdt=11k ct=470 p f , rdt=6.2k ct=1nf , rdt=3k ( k ohms ) ( k ohms ) fre q ( khz ) ct=470 p f , rdt=2.7k ct=1nf , rdt=1.2k figure 8: f osc versus effective r t (t dead = 2.0 usec) figure 9: f osc versus effective r t (t dead = 1.0 usec) lamp protection & automatic restart circuitry operation four pins on the IRS21571D are used for protection, as shown in figure 10 below. these are vdc (dc bus monitor), sd (unlatched shutdown), cs (latched shutdown) and oc (cs+ threshold programming). +v bus over- temp detect 2 4.0v 5.1v 7.6v 3.0v 5.1v 1 1.0ua cph dt vdc 7 q t rq 8 oc 2.0v q s rq 10 0.2v cs qd rq clk q s rq under- voltage detect from oscillator section from lower lamp cathode r cs r3 r4 r5 r1 c1 r2 q2 9 sd 50ua 7.6v 7.6v 7.6v r oc v cc c2 figure 10: lamp protection & automatic restart circuitry block diagram with external component connection
IRS21571D www.irf.com ? 2008 international rectifier 20 sensing the dc bus voltage the first of these protection pins s enses the voltage on the dc bus by means of an external resistor divider and an internal comparator with hysterisis. when power is first supplied to the ic at system startup, 3 conditions are required before oscillation is initiated: 1.) the voltage on the vcc pin must exceed the rising undervoltage lockout threshol d (12.5v), 2.) the voltage at the vdc pin must exceed 5.1v, and 3.) the voltage on the sd pin must be bel ow approximately 1.85v. if a low dc bus condition occurs during normal operation, or if power to the ballast is shut off, the dc bus will collapse prior to the vcc of the chip (assuming the vcc is derived from a char ge pump off of the output of the half-bridge). in this case, the voltage on the vdc pin will shut the oscillato r off, thereby protecting t he power transistors from potentially hazardous hard switching. approximately 2v of hysterisis has been designed into the internal comparator sensing the vdc pin, in order to account for variations in the dc bus voltage under varying load conditions. when the dc bus recovers, the chip restarts from the beginning of the control sequence, as shown in timing diagram figure 11 below. run mode low vdc vdc 3 5 ct 4 cph 8 lo 15 ho-vs 15 restart figure 11: vdc pin fault and auto restart lamp presence detection and automatic restart the second protection pin, sd, is used for both unlatc hed shutdown and automatic restart functions. the sd pin would normally be connected to an external circuit which s enses the presence of the lamp (or lamps). a example circuit for a single lamp is shown in figure 12.
IRS21571D www.irf.com ? 2008 international rectifier 21 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 IRS21571D vdc cph rph rt run ct dt oc lo com vcc vb vs ho sd cs + v bus + rectified ac line v bus return c bs d boot r supply c vcc r cs l res c res r ghs r gls c block c snubber r4 r3 r5 c2 d1 d2 figure 12: lamp presence detection circuit connection (shaded area) when the sd pin exceeds 2.0v (approx imately 150mv of hysterisis is in cluded to increase noise immunity), signaling either a lamp fault or lamp removal, the osc illator is disabled, both gate driver outputs are pulled low, and the chip is put into the micropower mode. since a lamp fault would normally lead to a lamp exchange, when a new lamp is inserted into the fixture, the sd pin w ould be pulled back to near the ground potential. under these conditions a reset signal would restart the chip from the beginning of the control sequenc e, as shown in the timing diagram in figure 13. ct 4 sd 2 cph 8 lo 15 ho-vs 15 restart run mode sd mode figure 13: sd pin fault and auto restart thus, for a lamp removal and replacement, the ballast aut omatically restarts the lamp in the proper manner, maximizing lamp life and minimizing stress on the power mosfets or igbts.
IRS21571D www.irf.com ? 2008 international rectifier 22 half-bridge current sensing and protection the third pin used for protection is the cs pin, which is nor mally connected to a resistor in the source of the lower power mosfet, as shown in figure 14. the cs pin is used to sense fault conditions such as fa ilure of a lamp to strike, over-current during normal operation, hard switching, no load, and operation below resonance. if any one of these conditions is sensed, the fault latch is set, the oscillator is disabled, the gate driv er outputs go low, and the chip is put into the micropower mode. the cs pin performs its sensing functions on a cycle-by-cycle basis in or der to maximize ballast reliability. rec ti fi e d ac line 1 / 2 bridge output q1 +v bus c vcc r supply d1 d2 q2 c snubber v bus return d boot c boot r cs r3 r gls r ghs 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 IRS21571D cph rph rt run ct dt oc lo com vcc vb vs sd cs vdc ho r oc figure 14: half-bridge current sensing circuit connection (shaded area) for the over-current, failure-to-strike, and hard switchi ng fault conditions, an externally programmable, positive- going cs+ threshold is enabled at the end of the preheat ti me. the level of this positive-going threshold is determined by the value of the resistor r oc . the value of the resistor r oc is determined by the following formula: r v 50e - 6 , or v = 50e - 6 r oc cs+ cs + oc = ? for the under-current and under-resonance conditions, there is a negative-going cs- threshold of 0.2v which is enabled at the onset of the run mode. the sensing of this cs- threshold is synchronized with the falling edge of the lo output. figures 15, 16 and 17 are oscillographs of fault conditions. fi gure 15 shows a failure of the lamp to strike, figure 16 shows a hard switching condition and fi gure 17 shows an under-current condition.
IRS21571D www.irf.com ? 2008 international rectifier 23 cs vs figure 15: lamp failure to strike cs vs figure 16: hard switching condition
IRS21571D www.irf.com ? 2008 international rectifier 24 cs vs figure 17: operation below resonance recovery from such a fault condition is accomplished by cycling either sd pin or the vcc pin. when a lamp is removed, the sd pin goes high, the fault latch is rese t, and the chip is held off in an unlatched state. lamp replacement causes the sd pin to go low again, reinitiating the startup sequence. the fault latch can also be reset by the undervoltage lockout signal, if vcc falls below the lower undervoltage threshold. sd vs cph figure 18: auto restart for lamp replacement
IRS21571D www.irf.com ? 2008 international rectifier 25 package details: so16n
IRS21571D www.irf.com ? 2008 international rectifier 26 f 10.20 10.40 0.402 0.409 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 package details: soic16n, tape and reel e f a carrier tape dimension for 16soicn code min max min max a 7.90 8.10 0.311 0.318 b 3.90 4.10 0.153 0.161 c 15.70 16.30 0.618 0.641 d 7.40 7.60 0.291 0.299 e 6.40 6.60 0.252 0.260 metric imperial reel dimensions for 16soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 22.40 n/a 0.881 g 18.50 21.10 0.728 0.830 h 16.40 18.40 0.645 0.724 metric imperial c d g a b h n ote : controlling dimension in mm loaded tape feed direction a h f d b c e g
IRS21571D www.irf.com ? 2008 international rectifier 27 part marking information
IRS21571D www.irf.com ? 2008 international rectifier 28 ordering information standard pack base part number package type form quantity complete part number soic16n tube/bulk 48 IRS21571Dspbf IRS21571D soic16n tape and reel 2500 IRS21571Dstrpbf the information provided in this document is believed to be accu rate and reliable. however, international rectifier assumes no responsibility for the consequences of the use of this in formation. international rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. no license is granted by implication or other wise under any patent or patent rights of international rectifier. the specif ications mentioned in this docum ent are subject to change withou t notice. this document supersedes and replaces all information previously supplied. for technical support, please contact ir?s technical assistance center http://www.irf.com/technical-info/ world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105

▲Up To Search▲

Price & Availability of IRS21571D

	To Download IRS21571D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .